Conventionally, a switching power supply device 10 of a step-down chopper system, shown in FIG. 16, for example, is known as a switching power supply device provided with: a main oscillation element which is connected to an input power source in series; and a synchronized rectifying element which turns on/off complementarily with the main oscillation element.
First, a circuit configuration of the switching power supply device 10 will be described. This power supply device is provided with an inverter circuit 12 having a main oscillation element TR1, one terminal of which is connected to a positive side of an input power source E for supplying an input voltage Vin; and a predetermined intermittent voltage is generated at the other terminal of the main oscillation element TR1 by turning on/off the main oscillation element TR1. This main oscillation element TR1 is an N-channel, MOS-type electric field effect transistor (hereinafter, referred to as an “Nch-FET”), one terminal of which is a drain terminal, and is connected to the positive side of the input power source E, the other terminal of which is a source terminal and is an output of an intermittent voltage.
A rectifying circuit 14 having a synchronized rectifying element SR1 for rectifying the above-mentioned intermittent voltage is provided with an output of the inverter circuit 12 and a negative side of the input power source E, and the rectified voltage obtained by rectifying the abovementioned intermittent voltage is output to each end of the synchronized rectifying element SR1. This synchronized rectifying element SR1 is an Nch-FET, for example, a drain terminal is connected to a source terminal of the main oscillation element TR1, and the source terminal is connected to the negative side of the input power source E. In general, inside the Nch-FET, a PN-junction-type parasitic diode DSR1 is formed from the source to the drain. Therefore, the abovementioned rectifying element is substantially comprised of a parallel circuit of the synchronized rectifying element SR1 and the parasitic diode DSR1.
A smoothing circuit 16, which is obtained by connecting an inductor Lo and a capacitor Co in series, is connected to each end of the synchronized rectifying element SR1, and an output voltage Vout, which is obtained when the abovementioned rectified voltage is smoothened, is generated at each end of the capacitor Co. Predetermined power is then supplied to a load LD which is connected to each end of the capacitor Co.
In addition, each of control pulses Vga, Vgb which are generated by a control circuit PW1 and turn on/off complementarily is input to a gate terminal which the main oscillation element TR1 and the synchronized rectifying element SR1 have. The control pulses Vga, Vgb are pulse-width modulated and generated based upon an input voltage Vin and an output voltage Vout. Further, in the operations of the control pulses Vga and Vgb, a delay time Δtd, which causes the main oscillation element TR1 to turn on, is set within a predetermined period of time after the synchronized rectifying element SR1 has turned off.
Next, an operation of the switching power supply device 10 will be described with reference to FIGS. 17 and 18. In a duration I, the control pulse Vga is in a high level state, and a main oscillation element TR1 turns on. On the other hand, the control pulse Vgb is in a low level state, the synchronized rectifying element SR1 turns off. Therefore, as shown in FIG. 18(a), the input power source E supplies a power current to a path running through the main oscillation element TR1, the inductor Lo, the capacitor Co, and the load LD, and at the same time, accumulates excitation energy to the inductor Lo.
In a duration II, the control pulse Vga indicates a low level, and the main oscillation element TR1 turns off. On the other hand, the control pulse Vgb indicates a high level, and the synchronized rectifying element SR1 turns on. Therefore, as shown in FIG. 18(b), due to counter-electromotive power generated in the inductor Lo, a power current flows in the path running through the capacitor Co and the load LD and/or the synchronized rectifying element SR1, and the excitation energy accumulated in the inductor Lo is radiated. At this time, since conduction resistance of the synchronized rectifying element SR1 is sufficiently small, no power current flows in the parasitic diode DSR1.
A duration III is a duration of the delay time Δtd from a time point when the abovementioned synchronized rectifying element SR1 turns off to a time point when the main oscillation element TR1 turns on. This delay time Δtd is set to prevent a surge current from flowing due to the occurrence of a substantial short-circuit at each end of the input power source E if the main oscillation element TR1 and the synchronized rectifying element SR1 turn on simultaneously. In this duration III, the control pulse Vga indicates a low level, and the main oscillation element TR1 turns off. On the other hand, the control pulse Vgb also indicates a low level, and the synchronized rectifying element SR1 also turns off. Therefore, as shown in FIG. 18(c), the power current due to the counter-electromotive power generated in the inductor Lo flows in the path running through the capacitor Co and the load LD and/or the parasitic diode DSR1.
When a duration IV is entered, the control pulse Vga is inverted to a high level, and the main oscillation element TR1 turns on. On the other hand, the control pulse Vgb is maintained at a low level and the synchronized rectifying element SR1 turns off. If the main oscillation element TR1 turns on, a reverse current is applied to each end of the parasitic diode DSR1 in which a forward current has flown so far, and a recovery current can flow in a direction from a cathode terminal to an anode terminal. Therefore, as shown in FIG. 18(d), a current flows from the input power source E to a path running through the main oscillation element TR1 and/or the parasitic diode DSR1. The recovery current will be described later.
As described above, the switching power supply device 10 performs an operation of converting the input voltage Vin to the predetermined output voltage Vout and supplying output power to the load LD, by repeating the operations of the abovementioned duration I to IV.
In addition, as disclosed in patent document 1, there is a switching power supply device comprising a configuration in which: a regenerative snubber circuit obtained by serially connecting a capacitor to a parallel circuit of a diode and a transistor is provided at each end of a commutation element; if a main oscillation element turns on, and at the same time, a commutation element turns off, the energy accumulated in a leakage inductor of a smoothing inductor is absorbed in the capacitor via the diode, and the transistor is turned on after the elapse of a predetermined period of time, thereby regenerating the absorbed energy in a secondary-side commutation circuit. Although a specific mode of the commutation element in this switching power supply device is not mentioned, it is construed that the working and effect set forth in patent document 1 are attained, in the case of employing an Nch-FET having a parasitic diode in addition to a general PN-junction-type diode as well.